S. K. Mohapatra, K. P. Pradhan, L. Artola, and P. K. Sahu,"Estimation of analog/RF figures-of-merit using device design engineering in gate stack double gate MOSFET", Materials Science in Semiconductor Processing, vol.31, pp.455-462, Elsevier, March 2015, 10.1016/j.mssp.2014.12.026 Article
N. P. Nath, S. R. Parija, P. K. Sahu, and I. S. S,"Brief comparison of sequential paging and concurrent paging in cellular technology", in 2015 International Conference on Industrial Instrumentation and Control (ICIC), pp.1078-1082, IEEE, Pune, India 2015, 10.1109/IIC.2015.7150907 Inproceedings
A. Biswas, P. K. Sahu, and M. Chandra,"Audio visual isolated Hindi digits recognition using HMM", International Journal of Computational Vision and Robotics, vol.5, no.3, pp.320-334, Inderscience, December 2015, 10.1504/IJCVR.2015.071336 Article
S. K. Mohapatra, K. P. Pradhan, and P. K. Sahu,"Temperature dependence inflection point in ultra-thin Si directly on insulator (SDOI) MOSFETs: an influence to key performance metrics", Superlattices and Microstructures, vol.78, pp.134-143, Elsevier, February 2015, 10.1016/j.spmi.2014.11.037 Article
S., P. K. Sahu, and S. K. Behera,"Design and optimisation of a zeroth order resonant antenna along with experimental verification for wireless applications", International Journal of Signal and Imaging Systems Engineering, vol.8, no.1, pp.105-114, Inderscience, December 2015, 10.1504/IJSISE.2015.067051 Article
B. Jena, K. P. Pradhan, S. Dash, G., P. K. Sahu, and S.,"Performance analysis of undoped cylindrical gate all around (GAA) MOSFET at subthreshold regime", Advances in Natural Sciences: Nanoscience and Nanotechnology, vol.6, no.3, pp.1-4, IOPScience, June 2015, 10.1088/2043-6262/6/3/035010 Article
K. P. Pradhan, M., S., and P. K. Sahu,"Analytical modeling of threshold voltage for Cylindrical Gate All Around (CGAA) MOSFET using center potential", Ain Shams Engineering Journal, vol.6, no.4, pp.1171-1177, Elsevier, December 2015, 10.1016/j.asej.2015.04.009 Article
K. P. Pradhan, S., and P. K. Sahu,"Design equivalent scaling on double gate FinFET towards analog and RF figures of merits: A technology computer aided design estimation", Journal of Low Power Electronics, vol.11, no.3, pp.316-322, American Scientific Publishers, September 2015, 10.1166/jolpe.2015.1396 Article
K. P. Pradhan, P. K. Sahu, D. Singh, L. Artola, and S.,"Reliability analysis of charge plasma based double material gate oxide (DMGO) SiGe-on-insulator (SGOI) MOSFET", Superlattices and Microstructures, vol.85, pp.149-155, Elsevier, September 2015, 10.1016/j.spmi.2015.05.034 Article
S., K. P. Pradhan, D. Singh, and P. K. Sahu,"The role of geometry parameters and fin aspect ratio of sub-20nm SOI-FinFET: An analysis towards analog and RF circuit design", IEEE Transactions on Nanotechnology, vol.14, no.3, pp.546-554, IEEE, May 2015, 10.1109/TNANO.2015.2415555 Article