Course Details
Subject {L-T-P / C} : EC6272 : ASIC Design Laboratory { 0-0-3 / 2}
Subject Nature : Practical
Coordinator : Prof. Kamalakanta Mahapatra
Syllabus
Experiments with RTL Design, Experiments on FSM Design and Verification,Basic Verification using Simulation, Experiments on Coverage Analysis in Verification, Logic Design Synthesis, Gate Level Simulation, DFT Insertion and Test Pattern Generation,Power Analysis using Synopsys Power Compiler , Basic Static Timing Analysis using Primetime,
Basic Placement and Routing using Cadence SoC Encounter.
Course Objectives
- To learn of basic design approaches of Application Specific Integrated Circuits
- To finally come out with practical knowledge of doing tapeout.
Course Outcomes
CO1: To well versed with the ASIC design flow used in IC design using industry standard EDA tools (Synopsys and Cadence). <br />CO2: Learning the designing skill of Finite state machine used in complex digital design using HDL. <br />CO3: Able to perform verification of the designs by writing test benches and perform the coverage analysis <br />CO4: Preform synthesis of the design, generate the gate level netlist and report the area, timing and Power analysis. <br />CO5: Perform the gate level simulation, placement and routing of design using EDA Tools <br />CO6: Preform the hands-on practice of creating ICs with the knowledge of IC design flow and using industry standard EDA Tools.
Essential Reading
- Michael Smith, Application Specific Integrated Circuits, Addison welsely
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Supplementary Reading
- Kishore Mishra, Advanced Chip Design, Createspace Independent Pub
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