National Institute of Technology Rourkela

राष्ट्रीय प्रौद्योगिकी संस्थान राउरकेला

ଜାତୀୟ ପ୍ରଯୁକ୍ତି ପ୍ରତିଷ୍ଠାନ ରାଉରକେଲା

An Institute of National Importance

Syllabus

Course Details

Subject {L-T-P / C} : EC6203 : Reconfigurable System Design { 3-0-0 / 3}

Subject Nature : Theory

Coordinator : Ayas Kanta Swain

Syllabus

Module 1 :

Module 1: 6 Hours
Introduction: Introduction to Reconfigurable Computing Systems: Objectives, Expectations, Logistics, characterization of Reconfigurable Computing & Reconfigurable Hardware, Reconfigurable Software.


Module 2: 6 Hours
Basics of HDL: Basic concepts of hardware description languages (VHDL , Verilog HDL), logic and delay modeling, Structural, Data-flow and Behavioral styles of hardware description, Architecture of event driven simulators, Syntax and Semantics of VHDL, Variable and signal types, arrays and attributes, Operators, expressions and signal assignments.

Module 3: 8 Hours
Designing with HDL: Entities, architecture specification and configurations, Component instantiation, Concurrent and sequential constructs, Use of Procedures and functions, Synthesis of logic from hardware description. Finite state machine design.


Module 4: 7 Hours
Reconfigurable Architecture: Types of Reconfiguration, Details study of FPGA, Design tradeoffs, Bidirectional wires and switches, FPGA Placement: Placement Algorithms, FPGA Routing, Timing Analysis, Network Virtualization with FPGAs, On-chip Monitoring Infrastructures, Multi-FPGA System Software, Logic Emulation, Applications, High Level Compilation VLSI/FPGA. Reconfigurable Coprocessors, Power Reduction techniques,A brief idea on SoC.


Module5: 5 Hours
Timing Analysis:
Static Timing analysis (STA) of Digital Circuits: Setup, hold time check, Fixing STA violations.

Course Objective

1 .

To learn designing using HDLs in FPGA platforms

Course Outcome

1 .

CO1: Create the knowledge of high level VLSI design coding language to carry out research and development in the area of digital IC design.
CO2: Model the digital designs including FSMs to Processor architectures using the knowledge of HDL Language.
CO3: Apply the knowledge of Reconfigurable architectures like FPGAs in designing and implementing digital ICs.
CO4: Apply the techniques to improve the timing analysis of digital circuits..
CO5: Implement practical and state of the art of Digital VLSI design, suitable for real life and Industry applications.

Essential Reading

1 .

C. H. Roth, Digital Systems Design Using VHDL, Thomson Publications , 2002

2 .

Scott Hauck and Andre DeHon, Reconfigurable Computing, Morgan Kaufmann , 2008

Supplementary Reading

1 .

R. C. Cofer and B. F. Harding, Rapid System Prototyping with FPGAs: Accelerating the Design Process, Elsevier/Newnes , 2005

2 .

J Bhasker, A Verilog Primer, Star Galaxy Publishing