Course Details

Subject {L-T-P / C} : EE3704 : Embedded Systems Laboratory { 0-0-2 / 1}

Subject Nature : Practical

Coordinator : Dr. Supratim Gupta

Syllabus

Module-I: Introduction / Practice Session [ 3 hr.]

• Motivation of the work and design procedures and components to be used through the laboratory sessions.
• Learning Proteus Environment for simulation of circuits with microcontroller
• Learning Filter Design & Analysis (FDA) toolbox of MATLAB

Module-II: ADC-0808 and DAC-0808 interfacing [ 6 hr.]

• Input Sinusoidal Signal of variable amplitude & frequency
• Develop RTOS to measure the input & output (after DAC) amplitude & frequency
• Tabulate at least 20 reading and find the limitation of your system

Module-III: Design Low pass (LP) with FIR structure of 2nd order [ 9 hr.]

• Cut-off frequencies for LP is last 4-digit of lowest Roll number of your group in Hz.
• Develop RTOS–with FIFO structure for signal access–to realize the filters in the circuit developed in Task-1
• Consider integer, fixed point precision for computation
• Tabulate readings for each of the occasions and each type of filters to get frequency response and compare it with the frequency responses obtained in MATLAB FDA tool
• Measure latency of your system i.e. time delay between occurrence i/p to o/p
• Analyse and comment if the filter specification is met
Draw RTL schematic for this design.

Module-IV: Design Low pass (LP) with IIR structure of order higher than 4 [ 9 hr.]

• Cut-off frequencies for LP is last 4-digit of lowest Roll number of your group in Hz
• Develop RTOS–with FIFO structure for signal access–to realize the filters in the circuit developed in Task-1-2
• Consider integer, fixed point precision for computation
• Consider full order realization & cascaded 2nd order filters realization
• Tabulate readings for each of the occasions of filter precision and structure (full & cascaded) to get frequency
response and compare it with the frequency responses obtained in MATLAB FDA tool
• Measure latency of your system i.e. time delay between occurrence i/p to o/p
• Analyse your system if the filter specification is met and is stable, what is the minimum precision required, if the stability depends on order
• Draw RTL schematic for this design.

Module-V: Hardware realization [ 9 hr.]

Hardware realization of either of the filters designed in Tasks 2-5 on system developed in Task 1 on bread boards

Course Objectives

Course Outcomes

At the end of the course, students will be able to <br />CO1. Apply Filter Design Tool of MATLAB for designing FIR & IIR filters with given specification <br />CO2. Write compact Real-time Operating System (RTOS) for Digital Signal Processing (DSP) System <br />CO3. Simulate digital filters with signal interfaces with embedded processor 8051 in Proteus IDE <br />CO4. Determine performance of FIR & IIR digital filter with the simulator <br />CO5. Realize stable digital filter of 2nd & higher order FIR/IIR filter & signal interfaces on hardware

Essential Reading

Supplementary Reading