Course Details

Subject {L-T-P / C} : EC4713 : Reconfigurable System Design Laboratory { 0-0-2 / 1}

Subject Nature : Practical

Coordinator : Prof. Debiprasad Priyabrata Acharya

Syllabus

Prerequisite: Basics of Verilog programming and digital circuitry learnt from their previous lab or theory courses. This lab is focused to perform advance experiments on FPGA implementation of digital systems.
Design and Simulation of Basic Building Block of Digital Systems
1. Design and simulation of combinational circuits using structural modelling. Report the resource utilization summery after implementation:
1. 4-bit comparator
2. Constant Multiplier
2. Design and simulation of sequential circuits using structural modelling. Report the resource utilization summery after implementation
1. 4-bit loadable up counter
2. 2-bit pipeline array multiplier
3. Memory Design: Design ROM, RAM and Dual Port Memory using behavioral modelling and IP cores for 4-bit data width and 3-bit address.
4. Design and simulation of the following digital systems using FSM design style in behavioral HDL modelling
1. Sequence detectors using Mealy and Moore Machine.
2. FSM for interfacing (ADC and DAC).
FPGA based System Design
In this section, fixed point data representation will be used and 16-bit data width will be preferred. This experiment is divided into some objectives which are to be covered in 4-6 days.
a) Design entry in Verilog structural style.
b) Synthesis and implementation using timing constraints.
c) Find maximum frequency and hardware resources.
d) Find dynamic power consumption.
e) Observe the output in Chip Scope Pro

5. FIR filter design: Implement a basic FIR filter and find its design performance.
6. FPGA implementation of 8-point DIT FFT using high performance DSP blocks.
7. FPGA implementation of a digital PID controller and its demonstration for plant automation.
8. FPGA implementation of Machine Learning Algorithms: Implement a basic prototype of K-Means clustering algorithm.
Tools – XILINX ISE 14.7 or VIVADO
FPGA Kits: Spartan 3E Starter Kit (XC3S500E), ZYBO Board (XC7Z010), NEXYS 4 DDR 2 (XC7A100T)
Mini Projects: Interface the following with FPGA – UART, VGA, Keyboard and Mouse, External Memory, LAN Port, External Microcontroller, Wi-Fi module, GPS module, Sensors ( Infrared and Ambient Light, Temperature, Accelerometer), Bluetooth module, LCD display etc.
LIST OF EXPERIMENTS ON PSOC3 (First two)
1. Introduction to PSOC3 development kit and WAP to blink LED with pulse width modulation on PSOC3 kit using CY8C38.
2. Implement Delta Sigma ADC in Differential Mode to display digital value on LCD module of fed analog voltage with PSoC3 kit using CY8C38.
3. Implement Analog Voltage Comparator with PSoC3 kit using CY8C38.
4. Implement 7-bit Down Counter with PSoC3 kit using CY8C38.
5. Implement inverting programmable gain amplifier with PSOC3 using CY8C38.
LIST OF EXPERIMENTS ON FPAA (First two)
1. Introduction to the Anadigm FPAA kit. Realization of a basic Gain amplifier and simulation using Anadigm Designer 3.
2. Realization of basic rectifier circuits and simulation using Anadigm Designer 3.
3. To design an inverting and non-inverting amplifiers and simulate using Anadigm dual apex board and simulation. Estimate resource utilization.
4. Realization of the basic filter circuits with or without inbuilt filter FPAA functions. Program the FPAA and observe the output.
5. A sinusoidal input is to be modulated by an arbitrary square wave of higher frequency (Carrier Signal). The arbitrary square wave should be given from a LUT. Output is to be seen by CRO.

Course Objectives

Course Outcomes

CO1: explain the architecture of different reconfigurable systems. <br />CO2: apply the knowledge of design process of FPGA based Systems <br />CO3: apply the knowledge of design process of FPAA, SOPC and PSoC based Systems <br />CO4: design system for various practical applications

Essential Reading

Supplementary Reading