Course Details

Subject {L-T-P / C} : EC6201 : Digital VLSI Design { 3-0-0 / 3}

Subject Nature : Theory

Coordinator : Prof. Debiprasad Priyabrata Acharya

Syllabus

Introduction to VLSI Design, Overview of VLSI Design Methodologies, VLSI Design Flow, Design Hierarchy, Concepts of Regularity, Modularity and Locality, VLSI Design Styles, Quality Metrics, Packaging, Levels of abstraction and the complexity of design, Challenges of VLSI design: power, timing, area, noise, testability, reliability and yield CAD tools: simulation, layout, synthesis, testing.
VLSI fabrication principles, Layout design, Design rules, Stick diagrams
MOS Transistors, MOS modeling, Short-channel effects and velocity saturation, Scaling of MOS circuits, MOS device models, MOS Inverters: Static Characteristics Resistive Load Inverter, The CMOS inverter, VTC, Noise margins and power dissipation, MOS Inverters: Switching Characteristics RC interconnect modeling, Driving large capacitive load, reducing RC delays
MOS combinational logic circuits, CMOS logic circuits, Complex logic circuits, CMOS Transmission Gates, Complementary Pass Transistor Logic, Transistor sizing in static CMOS, logical effort, Pass-transistor logic, sizing issues.
Sequential Logic Circuits: Introduction, Static Latches and Registers, Dynamic Latches and registers, Pipelining. Timing issues in Digital Circuits: Timing classification of digital systems, Synchronous Design Timing basics, clock skew, clock jitter and their combine impact.
Dynamic Logic Circuits: Pass Transistor Circuits, Voltage Bootstrapping, Synchronous Dynamic Logic, Dynamic CMOS Logic, High Performance Dynamic CMOS Circuits, Domino CMOS logic, NP-Domino Logic, Zipper CMOS Circuits, TSPC Dynamic CMOS
MOS memories: Introduction, DRAM, SRAM, Nonvolatile Memory, Flash Memory, Designing Arithmetic Building Blocks
Design for Manufacturability: Process variations, Parametric Yield Estimation and maximization, Worst-case analysis, Performance Variability Minimization. Design for testability: Fault types and models, Controllability and Observability, Ad Hoc Testable Design Techniques Packaging technology, I/O issues: ESD protection, input circuits, output circuits, On-chip Clock Generation and Distribution, CMOS latch-up and its prevention

Course Objectives

Course Outcomes

CO1: Able to carry out research and development in the area of Digital Integrated Circuits design. <br />CO2: To be well versed with the design of digital integrated circuits, MOS fundamentals and MOS models and analysis of MOSFET based digital circuits. <br />CO3: Able to analyze and design MOS inverters, combinational circuits, sequential circuits dynamic logic circuits and MOS memories. <br />CO4: Able to design digital integrated circuits for manufacturability and testability. <br />CO5: Solve practical and state of the art digital IC design problems to serve VLSI industries.

Essential Reading

Supplementary Reading