BIOGRAPHY
Dr. Santanu Sarkar completed his Ph.D on Analog and Mixed Signal VLSI circuit design from E& ECE department of the Indian Institute of Technology, Kharagpur, in 2015. Dr. Sarkar, completed his post-doctoral fellowship from the ECE department of National University of Singapore (NUS) in 2017. As a part of his post-doctoral research, he has successfully taped out a 12-bit Successive Approximation Register (SAR) based ADC in 40 nm LP-CMOS technology in TSMC. Presently, Dr. Santanu Sarkar is working as an Asst. Prof. in the ECE department of NIT Rourkela. Few of his research interest are High speed Digital-to-Analog data converter design (DAC), Low power Analog-to-digital data converter design (ADC), analog and mixed signal system design and biomedical circuits design. Dr. Sarkar, also worked in various time bound research projects sponsored by Department of Science and Technology (DST), Govt. of India, and Space Application Center (SAC), ISRO. Dr. Sarkar has successfully taped out ASICs in 180 nm and 40 nm CMOS technologies. Dr. Sarkar, has published several peer reviewed journals and conference papers. Presently, he is working as a PI in two ISRO sponsored projects and serving as Co-PI in two other SERB, Govt. of India, sponsored projects.
EXPERTISE INFORMATION
Research Group
- VLSI and Embedded Systems
Areas of Interest
- VLSI, Analog and Mixed Signal Design, and Radiation Hardening by Design
- Low power SAR ADC Design, Analog IC design and RISC Processor design
Santanu Sarkar Assistant Professor Grade-I
Electronics and Communication Engineering
sarkars@nitrkl.ac.in
0661 - 246 2472
20
PUBLICATIONS3
SPONSORED PROJECTS4
DOCTORAL STUDENTS2
CONTINUING EDUCATIONPERSONAL INFORMATION
Santanu Sarkar
Assistant Professor Grade-I
Electronics and Communication Engineering
Room Number: EC-123
Department of Electronics and Communication Engineering, National Institute of Technology Rourkela, Sundargarh, Odisha, India - 769008
2015
Ph.D.
Microelectronics and VLSI Design, E & ECE DeptIIT Kharagpur
2009
MS
Microelectronics and VLSI Design, E & ECE DeptIIT Kharagpur
2002
B.E
Instrumentation EngineeringJadavpur University
Teaching Experience
- VLSI, ECE, NIT Rourkela, 14 Jul 2014 - Present
- Applied Electronics and Instrumentation Engineering, HIT Kolkata, 01 Aug 2005 - 29 Dec 2006
Post Doctoral Research Experience
- VLSI-Low Power SAR ADC Design and Fabrication, NUS, Singapore, 18 Jul 2016 - 28 Dec 2017
Laboratory Development
- Data Converter Design DCD lab, NIT Rourkela (Project sponsored by ISRO), Design and development of data converters and testing of ICs.
Design and development of Mixed Signal SoC for Sensor Application in SCL 180nm. ISRO
- Principal Investigator
- 36
- Running Sponsored
Development of a closed-loop integrated MEMS capacitive accelerometer for inertial and navigation systems. Science & Engineering Research Board(SERB)
- Co-Investigator
- 36
- Completed Sponsored
Intelligent Surveillance Data Retriever (ISDR) for Smart City application IMPRINT INDIA
- Co-Investigator
- 36
- Completed Sponsored
Total Publications: 20
S. Khandagale and S. Sarkar,"A 6-Bit 500 MSPS Segmented Current Steering DAC with On-Chip High Precision Current Reference", in IEEE International Conference on Computing, Communication and Automation (ICCCA2016), IEEE, Noida, India, April 2016, 10.1109/CCAA.2016.7813858 Inproceedings
S. Sarkar and S. Banerjee,"An 8-bit low power DAC with re-used distributed binary cells architecture for reconfigurable transmitters", Microelectronics Journal, vol.45, no.6, pp.666-677, Elsevier, June 2014, 10.1016/j.mejo.2014.03.014 Article
S. Samanta and S. Sarkar,"A 10-bit 500 MSPS Segmented CS-DAC of > 77 dB SFDR upto the Nyquist with Hexa-decal biasing", in 24th International Symposium on VLSI Design and Test (VDAT) 2020, IEEE, July 2020 Inproceedings
S. Samanta and S. Sarkar,"A 1.8 V 8-bit 500 MSPS Segmented Current Steering DAC with > 66 dB SFDR", in Computer Society Annual Symposium on VLSI (ISVLSI 2020), IEEE, July 2020 Inproceedings
S. Samanta and S. Sarkar,"A Pairwise Swap Enabled Randomized DEMAddressing Intersegment Mismatch for Current Steering Digital-to-Analog Converters", IEEE Transactions on Very Large Scale Integration (VLSI) Systems, IEEE, June 2022, 10.1109/TVLSI.2022.3183353 Article
Micro-sensors and Interfacing Circuits Electronics and Communication Engineering (Workshop)
- Coordinator
- 18 Jul 2022 - 22 Jul 2022
- Brochure
Analog and Digital VLSI Design Flow and Embedded System Design Electronics and Communication Engineering (Workshop)
- Coordinator
- 04 Jul 2022 - 13 Jul 2022
- Brochure
- EC100 : Basic Electronics Engineering {Theory}
- EC2001 : Analog Electronics {Theory}
- EC202 : Digital Electronics {Theory}
- EC332 : Electronic Instrumentation {Theory}
- EC4201 : VLSI Design Techniques {Theory}
- EC421 : VLSI Design Techniques {Theory}
- EC6210 : Low Power VLSI Design {Theory}
- EC626 : Low Power VLSI Design {Theory}
- EC630 : Industrial Instrumentation {Theory}
- EC6301 : Industrial Instrumentation {Theory}
- EC6308 : Medical Instrumentation {Theory}
- EC633 : PC Based Instrumentation {Theory}
- EC270 : Basic Electronics Laboratory {Practical}
- EC2700 : Basic Electronics Laboratory {Practical}
- EC273 : Circuit Simulation Laboratory {Practical}
- EC276 : Digital Electronics Laboratory {Practical}
- EC377 : Electronics Design Laboratory {Practical}
- EC4709 : Virtual Instrumentation Laboratory {Practical}
- EC4713 : Reconfigurable System Design Laboratory {Practical}
- EC4715 : VLSI Design Laboratory {Practical}
- EC473 : Reconfigurable System Design Laboratory {Practical}
- EC475 : VLSI Design Laboratory {Practical}
- EC476 : Analytical and Biomedical Instrumentation Laboratory {Practical}
- EC6374 : Biomedical and Analytical Instrumentation Laboratory {Practical}
- EC663 : VLSI Devices and Process Simulation Laboratory (ATLAS, Cadence) {Practical}
Ph.D. Students [4]
Design and Implementation of High Performance Current Steering DACs using On-chip Enhancement Techniques
Smrutilekha SamantaEnrolled: Jul 2018Graduated : 2023Supervisor
Sensor Interfacing Circuits
Ipsita DashEnrolled: Aug 2021ContinuingCo-Supervisor
Analog Circuit Design, VLSI & Embedded System Design, Data Converter design
Deepika KumaradasanEnrolled: Aug 2021ContinuingSupervisor
ANALOG AND MIXED SIGNAL VLSI DESIGN
Sushanta BiswasarmaEnrolled: Aug 2023ContinuingSupervisor
M.Tech by Research Students [1]
Design and Development of Mixed Signal SoC for Sensor Application in SCL180nm
Mirza Amanullah Baig Asadullah BaigContinuingSupervisor
Awards And Honours
- Top-9 design in Cadence Design Contest, 2008
- Awarded National Scholarship for Secondary Examination, 1995
Memberships / Fellowships
- IEEE Senior member, IEEE Circuit and System Society, 2020