National Institute of Technology Rourkela

राष्ट्रीय प्रौद्योगिकी संस्थान राउरकेला

ଜାତୀୟ ପ୍ରଯୁକ୍ତି ପ୍ରତିଷ୍ଠାନ ରାଉରକେଲା

An Institute of National Importance

Faculty Profile

EXPERTISE INFORMATION

Research Group
  • Intelligent Computing and Computer Vision
Areas of Interest
  • EDA Tools for Integrated Circuits
  • Hardware Security
  • Natural Language Processing for Social Good
  • Intelligent IoT Systems & CPS
  • Hardware Acceleration
  • Embedded and Cyber Physical Systems
  • Quantum Computing

Shyamapada Mukherjee Associate Professor

Computer Science and Engineering

mukherjees@nitrkl.ac.in

36

PUBLICATIONS

3

DOCTORAL STUDENTS

1

CONTINUING EDUCATION

PERSONAL INFORMATION

Shyamapada Mukherjee

Associate Professor

Computer Science and Engineering

Room Number: CS-203

Department of Computer Science and Engineering, National Institute of Technology Rourkela, Sundargarh, Odisha, India - 769008

2015

Ph.D.
VLSI Physical Design Automation and FPGA Architectures
NIT Durgapur

2006

M.Tech
Computer Science and Engineering
University of Calcutta

2004

B.E
Computer Science and Engineering
University of Burdwan

Teaching Experience
  • Computer Science and Engineering,  NIT Rourkela,   28 Jun 2023 - Present
  • Computer Science and Engineering,  NIT Silchar,   21 Jul 2016 - 27 Jun 2023
  • Computer Science and Engineering,  BITS Pilani Rajasthan,   30 Dec 2015 - 17 Jul 2016
  • Computer Science and Engineering,  Dr. B. C. Roy Engineering College Durgapur,   01 Mar 2007 - 23 Dec 2015
Laboratory Development
  • Internet of Things,  NIT Silchar,   Internet of things lab at the department of CSe of NIT Silchar is equipped with mordern processor boards, signal generator and many more items for performing experiments

Total Publications: 36

S. Purkayastha and S. Mukherjee,"PHetDP: a placement algorithm for heterogeneous FPGAs with delayed packing", Circuits, Systems, and Signal Processing, vol.42, no.2, pp.801--827, Springer 2023, 10.1007/s00034-022-02159-4       Article

S. Banerjee, S. Mukherjee, S. Bandyopadhyay, and S. Bandyopadhyay,"An extract-then-abstract based method to generate disaster-news headlines using a DNN extractor followed by a transformer abstractor", Information Processing & Management, vol.60, no.3, pp.103291, Elsevier 2023, 10.1016/j.ipm.2023.103291       Article

S. Banerjee, S. Mukherjee, and S. Bandyopadhyay,"A novel centroid based sentence classification approach for extractive summarization of COVID-19 news reports", International Journal of Information Technology volume, vol.15, no.4, pp.1789--1801, Springer 2023, 10.1007/s41870-023-01221-x       Article

S. Mukherjee and S. Purkayastha,"Packing and Legalization Free Boolean Satisfiability-based Placement Algorithm for Heterogeneous FPGAs", arabian journal for science and engineering, vol.47, no.2, pp.83--96, springer nature singapore singapore}} 2022       Article

S. Manish, S. Shruti, and S. Mukherjee,"A Decentralized Crowdfunding Solution on top of the Ethereum Blockchain", in 2022 ieee silchar subsection conference (silcon), pp.1--6 2022       Inproceedings

Fundamentals of Quantum Computing (FQC 2024) Computer Science and Engineering (Short-term Course)

  • CS3007 : Compiler Design {Theory}
  • CS3062 : Principles of Operating Systems {Theory}
  • CS6520 : Quantum Computing {Theory}
  • CS3075 : Compiler Design Laboratory {Practical}

Ph.D. Students [3]
A Stuty and Development of Efficient Algorithms for Solving Placement Problems in Large Scale Mixed-size Design VLSI Circuits
Prasun Datta
Enrolled:
Graduated :  2022
Supervisor
SAT Based Rectilinear Steiner Tree Construction and its Applications in Global Routing
Sudeshna Kundu
Enrolled:
Graduated :  2022
Co-Supervisors
Placement Solutions for Heterogeneous FPGA Architecture
Sharbani Purkayastha
Enrolled:
Graduated :  2023
Supervisor
M.Tech by Research Students [1]
Plant Inspired Global Placement of Mixed-sized Hierarchical VLSI Circuits
Alok Das
Graduated :  2017
Supervisor

Memberships / Fellowships
  • IEEE,   2023