Course Details
Subject {L-T-P / C} : CS2074 : Computer Organization Laboratory { 0-0-3 / 2}
Subject Nature : Practical
Coordinator : Arun Kumar
Syllabus
Module 1 : |
1. Realization of basic logic gates using any hardware description language such as Verilog, VHDL.
|
Course Objective
1 . |
To get exposure with hardware description Language. |
2 . |
To implement adder circuits using basic gates. |
3 . |
To understand the converter circuits using basic gates. |
4 . |
To understand the various circuits for ALU, datapath and control units. |
Course Outcome
1 . |
Student should able to design and implement new digital circuit, embedded system, etc. |
Essential Reading
1 . |
SAMIR PALNITKAR, Verilog HDL: A Guide to Digital Design and Synthesis, Prentice Hall |
2 . |
Nazeih M.Botros, HDL Programming VHDL and Verilog, Dreamtech Press |