All Publications

S. Samanta and S. Sarkar,"A 10-bit 500 MSPS Segmented CS-DAC of > 77 dB SFDR upto the Nyquist with Hexa-decal biasing", in 24th International Symposium on VLSI Design and Test (VDAT) 2020, IEEE, July 2020       Inproceedings

S. Samanta and S. Sarkar,"A 1.8 V 8-bit 500 MSPS Segmented Current Steering DAC with > 66 dB SFDR", in Computer Society Annual Symposium on VLSI (ISVLSI 2020), IEEE, July 2020       Inproceedings

H. Srivastava, S. K. Das, and S. Sarkar,"An IoT based Pollution Monitoring system using Data Analytics Approach", in International Conference on Electronic Systems and Intelligent Computing (ESIC) 2020       Inproceedings

H. Srivastava, S. K. Das, and S. Sarkar,"An efficient IoT Technology cloud based Pollution Monitoring System", in 2nd International Conference on Emerging Trends and Advances in Electrical Engineering and Renewable Energy (ETAEERE), 2020       Inproceedings

H. Srivastava, S. K. Das, and S. Sarkar,"An IoT based Air Quality Monitoring with deep learning model System", in International Conference on Devices, Intelligent Systems & Communications (DISC),, January 2020       Inproceedings

S. Khandagale and S. Sarkar,"A 6-Bit 500 MSPS Segmented Current Steering DAC with On-Chip High Precision Current Reference", in IEEE International Conference on Computing, Communication and Automation (ICCCA2016), IEEE, Noida, India, April 2016, 10.1109/CCAA.2016.7813858       Inproceedings

S. Khandagale and S. Sarkar,"An 8-Bit 500 MSPS Segmented Current Steering DAC Using Chinese Abacus Technique,", in 20th International Symposium on VLSI Design and Test (VDAT), IEEE, Guwahati, India, May 2016, 10.1109/ISVDAT.2016.8064903       Inproceedings

S. Sarkar and S. Banerjee,"A 10-bit 500 MSPS segmented DAC with distributed octal biasing scheme", in 2015 International Conference on Signal Processing, Computing and Control (ISPCC), pp.145-148, IEEE, Waknaghat, India, September 2015, 10.1109/ISPCC.2015.7375014       Inproceedings

S. Sarkar and S. Banerjee,"A 10-Bit 500 MSPS segmented DAC with optimized current sources to avoid mismatch effect", in IEEE Computer Society Annual Symposium on VLSI (ISVLSI15), vol.07-10-july-2015, pp.172-177, IEEE Computer Society 2015, 10.1109/ISVLSI.2015.87       Inproceedings

S. Sarkar and S. Banerjee,"A 10 bit 1 GSPS nyquist DAC in 180 nm CMOS with high FOM", Analog Integrated Circuits and Signal Processing, vol.80, no.1, pp.59-68, Springer, July 2014, 10.1007/s10470-014-0309-x       Article