All Publications

S. Kumar and A. Mukherjee,"A Highly Robust and Low-Power Real-Time Double Node Upset Self-Healing Latch for Radiation-Prone Applications", IEEE Transactions on Very Large Scale Integration (VLSI) Systems, vol.29, no.12, pp.2076-2085, IEEE 2021, 10.1109/TVLSI.2021.3110135       Article

S. Kumar and A. Mukherjee,"A Self-Healing, High Performance and Low-Cost Radiation Hardened Latch Design", in IEEE International Symposium on Defect and Fault Tolerance in VLSI and Nanotechnology Systems (DFT), pp.1-6, IEEE, October 2021, 10.1109/DFT52944.2021.9568359       Inproceedings

A. R, D. Chaudhary, and A. Mukherjee,"Design of Low-Power DDR Controller and DRAM for Deep Learning and Server Applications", in IEEE 4th International Conference on Computing, Power and Communication Technologies (GUCON), pp.1-6, IEEE, November 2021, 10.1109/GUCON50781.2021.9573889       Inproceedings

S. Pal and A. Mukherjee,"A New Power-Gated Hybrid Defect Tolerant Approach Based on Modular Redundancy", in Asian Conference on Innovation in Technology (ASIANCON), pp.1-4, IEEE, October 2021, 10.1109/ASIANCON51346.2021.9544937       Inproceedings

A. Mukherjee and A. S. Dhar,"Defect tolerant majority voter design using triple transistor redundancy", in International Symposium on Smart Electronic Systems (iSES), pp.63-68, IEEE, NIT Rourkela, February 2020, 10.1109/iSES47678.2019.00026       Inproceedings

A. Mukherjee,"Defect Tolerant Approach for Reliable Majority Voter Design Using Quadded Transistor Logic", in IEEE REGION 10 CONFERENCE (TENCON), pp.165-169, IEEE 2020, 10.1109/TENCON50793.2020.9293826       Inproceedings

A. Gon and A. Mukherjee,"Removal of Noises from an ECG Signal Using an Adaptive S-Median Thresholding Technique", in IEEE Applied Signal Processing Conference (ASPCON), pp.89-93, IEEE 2020, 10.1109/ASPCON49795.2020.9276706       Inproceedings

D. Chaudhary, V. Muppalla, and A. Mukherjee,"Design of Low Power Stacked Inverter Based SRAM Cell with Improved Write Ability", in IEEE Region 10 Symposium (TENSYMP), pp.925-928, IEEE 2020, 10.1109/TENSYMP50017.2020.9230809       Inproceedings

A. Mukherjee and A. S. Dhar,"Triple transistor based triple modular redundancy with embedded voter circuit", Microelectronics Journal, vol.87, pp.101-109, Elsevier, May 2019, 10.1016/j.mejo.2019.03.014       Article

A. Mukherjee and A. S. Dhar,"Reliable VLSI architecture design using modulo-quad-transistor redundancy method", Circuits, Systems, and Signal Processing, vol.37, no.12, pp.5595-5615, Springer 2018, 10.1007/s00034-018-0837-1       Article