Syllabus

Module 1 (8 hours) :
REVIEW OF MICROELECTRONICS AND INTRODUCTION TO MOS TECHNOLOGIES: (MOS, CMOS, Bi CMOS) Technology trends and projections. Lithography, Oxidation, Ion implantation, Metalization, and Diffusion techniques. BASIC ELECTRICAL PROPERTIES OF MOS, CMOS & BICOMS CIRCUITS: Ids-Vds relationships, Threshold voltage Vt, Gm, Gds and Wo, Pass Transistor, MOS, CMOS & Bi CMOS Inverters, Zpu/Zpd, MOS Transistor circuit model, Latch-up in CMOS circuits.

Module 2 (6 Hours)
LAYOUT DESIGN AND TOOLS: Transistor structures, Wires and Vias, Scalable Design rules, and Layout Design tools. LOGIC GATES & LAYOUTS: Static complementary gates, switch logic, Alternative gate circuits, low power gates, Resistive and Inductive interconnect delays.

Module 3 (6 Hours)
COMBINATIONAL LOGIC NETWORKS: Layouts, Simulation, Network delay, interconnect design, power optimization, Switch logic networks, Gate and Network testing.

Module 4 (6 Hours)
SEQUENTIAL SYSTEMS: Memory cells and Arrays, clocking disciplines, System Design, power optimization, Design validation, and testing.

Module 5 (6 Hours)
FLOOR PLANNING & ARCHITECTURE DESIGN: Floor planning methods, off-chip connections, High-level synthesis, Architecture for low power, SOCs and Embedded CPUs, and Architecture testing.

Module 6 (6 Hours)
INTRODUCTION TO CAD SYSTEMS (ALGORITHMS) AND CHIP DESIGN: Layout Synthesis and Analysis, Scheduling and printing, Hardware/Software Co-design, chip design methodologies- A simple Design example.

It offers a profound understanding of the design of complex digital VLSI circuits, computeraided simulation and synthesis tool for hardware design

To bring both Circuits and System views on design together

The main objective of this course is to introduce basic concepts of microelectronics, layout designing, floor planning, and algorithms used in the chip design process.

To provide knowledge in ASIC design and implementation.

1. Students will be able to understand the concepts of and electrical properties of MOS technologies.
2. Will be able to understand different types of layout designing tools and floor planning methods used in chip design.
3. Students can design combinational logic networks and sequential systems.
4. The students will be able to understand CAD algorithms used in chip design.
5. Students will be aware of the trends in semiconductor technology, how it impacts scaling, and its effect on device density, speed, and power consumption.

Neil H.E. Weste, David Harris, Ayan Banerjee, CMOS VLSI Design A Circuits and Systems Perspective, Pearson , 3rd Edn. 2016

Yuan Taur and Tak H. Ning, Fundamentals of Modern VLSI Devices, Cambridge , 2nd. Edn. 2016

M S Suma , Poornima M , Namita Palecha, CMOS VLSI Design, New Age International , First edition (2017)

Douglas A. Pucknell and Kamran Eshraghian, Basic VLSI Design, Prentice Hall India , 3 edition (1995)