Syllabus

Module 1: Metrics for computer performance: clock rate, MIPS, CPI Strength and weakness of performance metrics role of Amdalh's in computer performance
Hierarchical memory system, main, cache and auxiliary memory, I/O subsystem, Average and Worst case access time, Multi-level cache memory, Split Cache, Cache Consistency.

Module 2: Classification of computer architecture: SIMD, MIMD, SISD and MISD Processing unit design: Data path implementation, Microprogrammed execution.
Principles of pipelining and vector processing: Pipelining, Instruction and Arithmetic Pipelines, Principles of Designing Pipelined Processor,Instruction pipelining and parallel processing,

Module 3:Instruction level parallelism: VLIW, Vector processor, Multithreaded processor, Superscalar architecture branch prediction Prefetching Speculative execution Vector Processing Requirements. Structure and Algorithms for array processors: SIMD Array Processors, SIMD Interconnection Networks, Parallel Algorithms for array Processors, Programming, Performance Evaluation and Compiler Transformations for parallel computers.
Associative Array Processing.

Module 4:Multiprocessor architecture and programming: Inter processor Communication Mechanisms, System Deadlocks and Protection, Multiprocessor Scheduling Strategies, Parallel Algorithm for Multiprocessor. Multiprocessor and Multi Computer architectures. Cache coherence problem.

Module 5: Recent advances in computer architecture. Introduction to Clusters, Grids, Cloud, Fog and Mist Computers. Safety and Fault Tolerance of Computer Architectures, Applications of Advanced Computer Architecture.

To identify the requirement for improving the performance of computing systems

To understand the overlapped and simultaneous parallelism

To identify the characteristics and performance of interconnection networks

To design computer systems for different applications

1. To design computer system for solving computational and communication intensive problems
2. To verify the performance of computing systems with extended components.
3. To understand the solutions for cache coherence and dead lock problem in multiprocessor and multi computer based systems

J. L.Henessy and D. A. Pattersan,, Computer Architecture A Quantitative approach,, Elsevier , 5th ed. 2009.

V.Rajaraman and C.Sivaramamurthy, Parallel Computers Architecture and Programming, PHI , 2000

Kai Hwang, Advanced Computer Architecture: Parallelism, Scalability, Programmability, Tata McGraw Hill , 2004

H.G.Cragon, Memory Systems and Pipelined Processors, Narosa , 1998.